Burglar Alarm With Timed Shutoff Circuit Diagram


This is a Burglar Alarm With Timed Shutoff Circuit Diagram. When SI (sensor) is closed, power is applied to U2, a dual timer. After a time determined by C2, CI is energized after a predetermined time determined by the value of C5, pin 9 of U2 becomes low, switching off the transistor in the optoisolater, cutting anode current of SCR1 and de-energizing Kl. The system is now reset. Notice that (i6x C2) is less than (R7xC$). The ON time is approximately given by:(R7xC5)-(R6xC2) = Ton 


Burglar Alarm With Timed Shutoff Circuit Diagram

Burglar Alarm With Timed Shutoff Circuit Diagram


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